integer cmd;
integer j;
integer addr;
reg [5:0] this_reg;

initial begin
   #100_000;
   cmd =0;
      
   // Slew
   // ----------------------------------------------------------------
   vcore_vin_uvlo.VIN_SLEW  = 100;
   
   $display("\n Master & owi");
   $display("---------------------------------------------------\n");
   sel_in_reg =1'b0;
   vddi2c_detect = 1'b1;           
   #100_000;

   $display("\n VIN plug @ 10V");
   $display("---------------------------------------------------\n");
   vcore_vin_uvlo.vin_lvl(10000);   
   @(posedge vin_uvlo);
   $display("\n enter precharge");  
   @(posedge en_clo_det);
   $display("\n CLO detection on going");      
   @(posedge en_cp);
   $display("\n enter precharge");
   @(posedge cp_div2);
    
// ----------------------------------------------------------------
// DIV2
// ----------------------------------------------------------------  
   #100_000;
   owi_mode_m_fld = 1'b1;

   $display("\n// unexpected start during RX_DATA");
   $display("---------------------------------------------------\n");
   @(negedge clk_115p2khz);            
   owi_vth_fld = 4'b0000;
   $display("\n//  send cmd= write regs ");
   owi_master.owiWr(6'b000010,2'b00); 
   #(owi_master.owi_bit_length);
   addr = 7;
   for (j = 0; j < 6 ; j = j + 1) begin
    this_reg[j] = owi_fields[6*addr+j];
   end       
   $display("\n//  send vth data ");
   owi_master.owiWr(this_reg,2'b01);  //vth      
   #(owi_master.owi_bit_length);

   $display("\n//  send cmd= extended regs ");
   owi_pwr_ok_fld = 1'b1; 
   owi_write_ext_regs_fields;
   owi_chg_ok_fld = 1'b1;
   #50_000;

   $display("\n// check status");
   owi_com_er_stat_fld = 1'b1;
   owi_read_status_fields(6'b111111);  
   #50_000;
    
   $display("\n// check regs have not been written");
   owi_vth_fld = 4'b0011;
   owi_read_regs_fields;  
   #50_000;
   
   $display("\n// check ext regs have been written and clear interrupt");
   owi_com_er_int_fld =1'b1;
   owi_read_ext_regs_fields(6'b111111); 
   #50_000;   

   $display("\n// check status again");
   owi_com_er_stat_fld = 1'b0;
   owi_read_status_fields(6'b111111);  
   #50_000;

   #500_000;

   $display("\n// unexpected start during CMD");
   $display("---------------------------------------------------\n");
   @(negedge clk_115p2khz);            
   owi_vth_fld = 4'b0000;
   $display("\n//  send cmd= write regs ");
   owi_master.owiWr(6'b000010,2'b00); 
   #(owi_master.owi_bit_length);

   $display("\n//  send cmd= extended regs ");
   owi_pwr_ok_fld = 1'b0; 
   owi_write_ext_regs_fields;
   owi_chg_ok_fld = 1'b0;
   #50_000;

   $display("\n// check status");
   owi_com_er_stat_fld = 1'b1;
   owi_read_status_fields(6'b111111);  
   #50_000;
    
   $display("\n// check regs have not been written");
   owi_vth_fld = 4'b0011;
   owi_read_regs_fields;  
   #50_000;
   
   $display("\n// check ext regs have been written and clear interrupt");
   owi_com_er_int_fld =1'b1;
   owi_read_ext_regs_fields(6'b111111); 
   #50_000;   

   $display("\n// check status again");
   owi_com_er_stat_fld = 1'b0;
   owi_read_status_fields(6'b111111);  
   #50_000;  
   
   #500_000;
    
   $display("\n// unexpected start during RX_PARITY");
   $display("---------------------------------------------------\n");
   @(negedge clk_115p2khz);            
   owi_vth_fld = 4'b0000;
   $display("\n//  send cmd= write regs ");
   owi_master.owiWr(6'b000010,2'b00); 
   #(owi_master.owi_bit_length);
   addr = 7;
   for (j = 0; j < 6 ; j = j + 1) begin
    this_reg[j] = owi_fields[6*addr+j];
   end       
   $display("\n//  send vth data ");
   owi_master.owiWr(this_reg,2'b01);  //vth      
   #(owi_master.owi_bit_length);
    addr = 8;    
    for (j = 0; j < 6 ; j = j + 1) begin
       this_reg[j] = owi_fields[6*addr+j];
    end     
    owi_master.owiWr(this_reg,2'b01);  //vcl
    #(owi_master.owi_bit_length);
    addr = 9;    
    for (j = 0; j < 6 ; j = j + 1) begin
       this_reg[j] = owi_fields[6*addr+j];
    end  
    owi_master.owiWr(this_reg,2'b01);  //cmd
    #(owi_master.owi_bit_length);
    addr = 10;    
    for (j = 0; j < 6 ; j = j + 1) begin
       this_reg[j] = owi_fields[6*addr+j];
    end  
    owi_master.owiWr(6'b000000,2'b01);  //sense
    #(owi_master.owi_bit_length);

   $display("\n//  send cmd= extended regs ");
   owi_pwr_ok_fld = 1'b1; 
   owi_write_ext_regs_fields;
   owi_chg_ok_fld = 1'b1; 
   #50_000;

   $display("\n// check status");
   owi_com_er_stat_fld = 1'b1;
   owi_read_status_fields(6'b111111);  
   #50_000;
    
   $display("\n// check regs have not been written");
   owi_vth_fld = 4'b0011;
   owi_vcl_fld = 3'b100;
   owi_read_regs_fields;  
   #50_000;
   
   $display("\n// check ext regs have been written and clear interrupt");
   owi_com_er_int_fld =1'b1;
   owi_read_ext_regs_fields(6'b111111); 
   #50_000;   

   $display("\n// check status again");
   owi_com_er_stat_fld = 1'b0;
   owi_read_status_fields(6'b111111);  
   #50_000;   
   
   repeat (1) #1_000_000;
// ----------------------------------------------------------------

   // End
   // ----------------------------------------------------------------
   END_SIM;
   
end

