// Created by ihdl
module digital_control_top ( 

// CORE
input             porb,       
output            en_vreg,
output            en_refs,

// CLOCK
input             clk_12Mhz,
input             tb_fast_clk,
output            fast_clk,
output            en_clk_12Mhz,         

// TSD
output            en_tsd,
input             tsd,
input             twarn_135C,
input             twarn_125C,

// VIN MONITOR
input             vin_uvlo,          
input             vin_vth,
input             vin_vcl,
input             vin_0p5,
output            en_vin_monitor,  
output            en_vin_vcl,  

output  [3:0]     prog_vth,            
output  [2:0]     prog_vcl,            

// CHARGE PUMP CTRL
output            en_cp,  
output            en_cpb,  
output            cp_clk_div2,              //internal 850khz or cli      
output            cp_clk_pass_thru,         //internal 850khz      
output            cp_pass_thru,        
output            cp_tsd,              
output            cp_wait,             
output            cp_div2,             
output            cp_en_pmos,          

// VLDO
input             ldo_oc,
input             ldo_rdy,           
output            en_vldo,
output            vldo_en_dischg,      ///a wrapper?
output [1:0]      prog_vldo,

// CLI/CLO
input             cli,
output            cli_in_en,        
input             clo_in,
output            clo_out,             ///to be wrapped ?
output            clo_out_en,          
output            clo_in_en,        
output            en_clo_det,
    
// ADC
input             adc_eoc,    
input   [10:0]    adc_data_out,
input             adc_outcomp,
input             adc_startb,
input             adc_busy,
input             adc_hold,

output            adc_clk,
output            adc_enconv,          //start pulse
output            en_adc,              
output  [1:0]     adc_chan_mux_ctrl,
output            adc_signed_conv,
output  [2:0]     adc_hold_delay,
output            adc_az_dis,
output            adc_ext_vref,

output            en_vin_meter,
output            en_iin_meter,

// MODE
input             mode_in,
output            mode_in_en,      
output            mode_out,
output            mode_out_en,

//SEL
input             sel_in,
output            sel_in_en,       
output            sel_out,
output            sel_out_en,

//CHG_OK
input             chg_ok_in,             
output            chg_ok_in_en,     
output            chg_ok_out,

// OWI/I2C
input             sda,
input             scl,
output            sda_out,
output            i2c_high_speed,
input             vddi2c_detect,

//REV_ID
input    [5:0]    rev_id,

// ANALOG TEST MUX
output            en_test_mux1,
output            en_test_mux2,
output   [2:0]    test_mux1_ctrl,
output   [2:0]    test_mux2_ctrl,


/// test bits outputs
output   [2:0]    tb_refs,        
output            tb_no_ldo_ishort,
output            ch_ok_pullup_dis,      //disable ch_ok pull up in testmode when pin is used 
output            force_uvlob,
output            force_vref_startup,

// OTP
input      [63:0] otp,
output            en_fuse_bypass,
output            tb_en_fuse_curr_sink,

input             otp_memvalid_1,
output            otp_sftset_1,
output            otp_sftrst_1,
output            otp_clk_1,
output            otp_reset_1,
output            otp_prog_1,
output            otp_sensez_1,
output            otp_lat_1,
output            otp_cursen1_1,
output            otp_cursen0_1
);

/// ****************************************************************************
/// Declarations
/// ****************************************************************************
//I2C
wire       [7:0] i2c_read_bus;
wire       [7:0] i2c_write_bus;
wire       [7:0] i2c_addr_bus;
wire       [6:0] IC_address;
wire              i2c_WR;
wire              i2c_RD;
wire      [127:0] reg_en;
//OWI
wire           read_data_oca_stat;
wire           read_data_ova_stat;
wire           read_data_ota_stat;
wire           read_data_com_er_stat;
wire           read_data_chg_ok_stat;
wire  [1:0]    read_data_vin_msb;
wire  [5:0]    read_data_vin_lsb;
wire  [1:0]    read_data_iin_msb;
wire  [5:0]    read_data_iin_lsb;
wire  [1:0]    read_data_temp_msb;
wire  [5:0]    read_data_temp_lsb;
wire  [3:0]    read_data_vth;
wire  [2:0]    read_data_vcl;
wire  [2:0]    read_data_div2_dly;
wire           read_data_clo_dis;
wire  [3:0]    read_data_n_cli;
wire           read_data_mode_m;
wire  [1:0]    read_data_ib_dly;
wire           read_data_pwr_ok;
wire           read_data_tsd_int;
wire           read_data_com_er_int;
wire           read_data_ota_int;
wire           read_data_ova_int;
wire           read_data_oca_int;
wire  [5:0]    read_data_rev_id;
wire [3:0]     write_data_vth;
wire [2:0]     write_data_vcl;
wire [2:0]     write_data_div2_dly;
wire           write_data_clo_dis;
wire [1:0]     write_data_ib_dly;
wire           write_data_pwr_ok;
wire           owi_WR;
wire           owi_RD;
wire [13:0]    owi_reg_en;

///otp
wire       [31:0] otp_reg;
wire              soft_write;
wire              hard_write;
wire              otp_sel;
wire              otp_loaded;
wire              otp_cmd_clr;
wire              re_latch;
wire              readback;

reg               test_mode_reg;
reg               test_mode_tmp;

/// otp defaults and options
wire       [1:0]  otp_adc_clk_sel;
wire       [1:0]  otp_i2c_add;
wire              otp_tsd_blk;
wire              otp_no_tx_resync;
wire              otp_no_rx_resync;
wire              otp_adc_az_dis;
wire       [3:0]  otp_vth;         
wire       [2:0]  otp_div2_dly;    
wire       [1:0]  otp_conv_period; 
wire       [1:0]  otp_vldo;        
wire              otp_testbits_open;
wire              otp_osc_byp;
wire              otp_no_wait_state;

/// fsm states
wire        [2:0] cp_state;

///enables
wire              cp_fsm_on;

/// prog i2c
wire              sda_out_i2c;
wire              vin_monitor_blk; 
wire       [3:0]  prog_vth_i2c;
wire       [2:0]  prog_vcl_i2c;
wire       [2:0]  prog_div2_dly_i2c;
//wire       [1:0]  prog_vldo;
wire       [1:0]  conv_period; 
wire              clo_dis_i2c;
wire              pwr_ok_i2c;
/// prog owi
wire              sda_out_owi;
wire       [1:0]  prog_ib_dly;
wire       [3:0]  prog_vth_owi;
wire       [2:0]  prog_vcl_owi;
wire       [2:0]  prog_div2_dly_owi;
wire              clo_dis_owi;
wire              pwr_ok_owi;

wire       [2:0]  prog_div2_dly;

///adc
wire        [7:0] iin;
wire        [7:0] vin;
wire        [7:0] vin_owi;
wire        [7:0] temp;
wire       [10:0] test_adc_data_out; 
wire        [7:0] iin_buf; 
wire        [7:0] vin_buf; 
wire        [7:0] temp_buf; 
wire              adc_manual;
wire              adc_manual_reg;
wire              i2c_req_done;

///synchro
wire              tsd_sync;

///dbnc

wire              otp_reg_hrst;
wire              rrst_noff;
wire              rrst_off;
wire              porb_scan;
wire              scl_scan;
wire              i2c_WR_scan;
wire              cp_fsm_on_scan;
wire              clo_det_done;

/// clock
wire            clk_12Mhz_scan;
wire            clk_10p6us_en;
wire            clk_42p6us_en;
wire            clk_2p66us_en;
wire            clk_1p33us_en;
wire            clk_666ns_en;
wire   [3:0]    n_cli;
wire            cp_fsm_exit;
wire            i2c_WR_noscan;
wire            i2c_WR_fuse_rrst_noff_scan;
wire            owi_WR_fuse_rrst_noff_scan;
wire            WR_fuse_rrst_noff_load;
wire            cp_clk_pass_thru_gen;
wire            cp_clk_div2_gen;

///wrapper
wire              wrap_en_vin_monitor;
wire              wrap_en_clk_12Mhz;
wire              wrap_en_tsd;
wire              wrap_en_vldo;
wire              wrap_en_clo_det;

wire              en_out_dig_mgnt;
wire              test_state;
wire        [5:0] dig_mux;
wire              otp_emul_zero;

///test bits
wire              tb_tsd_blk;
wire              tb_no_wait_state;
wire              tb_adc_dft_config;
wire              tb_adc_signed; 
wire     [1:0]    tb_adc_channel;
wire              tb_adc_ext_vref;
wire              tb_adc_az_dis;
wire     [2:0]    tb_adc_hold_delay;
wire     [1:0]    tb_clk_div2;
wire              tb_clk_pt_dis;
wire              tb_force_clo_in;
wire              tb_force_uvlob;

wire              scan_mode_sel;
wire              top_scan_mode;
wire              top_scan_enable;
wire              test_mode_ic;
wire              scan_mode_ic;

// Test Wrapped Outputs
wire            en_tsd_twrap;
wire            en_refs_twrap;
wire            en_clk_12Mhz_twrap;
wire            en_vin_monitor_twrap;
wire            en_vreg_twrap;
wire            en_vldo_twrap;
wire            en_clo_det_twrap;

// SCAN Wrapped Wires - Start
// SCAN Wrapped Inputs
// SCAN Wrapped Outputs
wire            en_vin_monitor_wrap;
wire            en_vreg_wrap;
wire            en_refs_wrap;
wire            en_tsd_wrap;
wire            en_clk_12Mhz_wrap;
wire            en_vldo_wrap;
wire            en_clo_det_wrap;
wire            test_mode_ic_wrap;
wire            sda_out_wrap;
wire     [2:0]  test_mux1_ctrl_wrap;
wire     [2:0]  test_mux2_ctrl_wrap;
wire            cp_clk_pass_thru_wrap;
reg             cp_clk_div2_wrap;

// SCAN Wrapped Wires - Stop

/// ****************************************************************************
/// Instances
/// ****************************************************************************   

// -----------------------------------------------------------------------------
// SCAN MUX
// -----------------------------------------------------------------------------
dig_scan_mux I_dig_scan_mux (
   .scan_mode                        ( top_scan_mode ),
   .scan_enable                      ( top_scan_enable ),
   .scan_rstb                        ( scan_rstb ),
   .scan_clk                         ( scan_clk ),
   .clk_12Mhz                        ( clk_12Mhz_int ),
   .clk_3Mhz                         ( clk_333ns ),
   .cli                              ( cli ), 
   .i2c_WR                           ( i2c_WR ),
   .owi_WR                           ( owi_WR ),  
   .scl                              ( scl ),
   .porb                             ( porb ),
   .otp_cmd_clr                      ( otp_cmd_clr ),
   .otp_loaded                       ( otp_loaded ),
   .i2c_req_done                     ( i2c_req_done ),
   .adc_manual_rstb                  ( adc_manual_rstb ),
   .owi_VIT_req_done                 ( owi_VIT_req_done ),
   .owi_VI_req_done                  ( owi_VI_req_done ),
   .cp_fsm_on                        ( cp_fsm_on ),
   .cp_fsm_exit                      ( cp_fsm_exit ),
   
   .clk_12Mhz_scan                   ( clk_12Mhz_scan ),
   .i2c_WR_scan                      ( i2c_WR_scan ),
   .i2c_WR_noscan                    ( i2c_WR_noscan ),
   .i2c_WR_fuse_rrst_noff_scan       ( i2c_WR_fuse_rrst_noff_scan ),
   .owi_WR_fuse_rrst_noff_scan       ( owi_WR_fuse_rrst_noff_scan ),
   .WR_fuse_rrst_noff_load           ( WR_fuse_rrst_noff_load ),
   .owi_WR_scan                      ( owi_WR_scan ),
   
   .cp_fsm_on_scan                   ( cp_fsm_on_scan ),
   .scl_scan                         ( scl_scan ),
   .cli_scan                         ( cli_scan ), 
   .porb_scan                        ( porb_scan ),
   .otp_reg_hrst                     ( otp_reg_hrst ),
   .rrst_noff                        ( rrst_noff ),
   .rrst_off                         ( rrst_off ),
   .i2c_done_rstb                    ( i2c_done_rstb ),
   .owi_VIT_done_rstb                ( owi_VIT_done_rstb ),
   .owi_VI_done_rstb                 ( owi_VI_done_rstb )
//   .rst_clk_en                       ( rst_clk_en )
);

// -----------------------------------------------------------------------------
// CLOCK
// -----------------------------------------------------------------------------
dig_clk I_dig_clk (
   .clk_12Mhz                   ( clk_12Mhz_scan ),
   .vcore_rdy                   ( porb_scan ),        
   .scan_en                     ( top_scan_enable ),
   .tb_fast_clk                 ( tb_fast_clk ),
   .clk_166ns_en                (  ),
   .clk_333ns_en                (  ),  
   .clk_666ns_en                ( clk_666ns_en ),     
   .clk_1p33us_en               ( clk_1p33us_en ),
   .clk_2p66us_en               ( clk_2p66us_en ),
   .clk_5p33us_en               ( clk_5p33us_en ),
   .clk_10p6us_en               ( clk_10p6us_en ), 
   .clk_21p3us_en               ( clk_21p3us_en ),
   .clk_42p6us_en               ( clk_42p6us_en ),
   .clk_85p3us_en               ( clk_85p3us_en ),
   .clk_170p6us_en              ( clk_170p6us_en ),
   .clk_341p3us_en              ( clk_341p3us_en ),
   .clk_682p6us_en              ( clk_682p6us_en ),
   .clk_1p37ms_en               (  ),
   .clk_2p73ms_en               (  ),
   .clk_5p46ms_en               (  ),
   .clk_10p9ms_en               (  ),
   .clk_21p8ms_en               (  ),
   .clk_43p7ms_en               (  ),
   
   .clk_166ns                   (  ),
   .clk_333ns                   ( clk_333ns ),  //3Mhz
   .clk_666ns                   (  ),
   .clk_1p33us                  (  ),
   .clk_2p66us                  (  ),
   .clk_5p33us                  (  ),
   .clk_10p6us                  (  ),
   .clk_21p3us                  (  ),
   .clk_42p6us                  (  ),
   .clk_85p3us                  (  ),
   .clk_170p6us                 (  ),
   .clk_341p3us                 (  ),
   .clk_682p6us                 (  ),
   .clk_1p37ms                  (  ),
   .clk_2p73ms                  (  ),
   .clk_5p46ms                  (  ),
   .clk_10p9ms                  (  ),
   .clk_21p8ms                  (  ),
   .clk_43p7ms                  (  )
);

// -----------------------------------------------------------------------------
// SYNC
// -----------------------------------------------------------------------------
dig_sync I_dig_sync (
      .porb                     ( porb_scan ),
      .clk_3Mhz                 ( clk_333ns),
      .clk_2p66us_en            ( clk_2p66us_en ),
      .vin_vcl                  ( vin_vcl_blanked ),   
      .vin_0p5                  ( vin_0p5 ),
      .vin_uvlo                 ( vin_uvlo_gated ),            
      .vin_vth                  ( vin_vth_mux ),    
      .tsd                      ( tsd_blanked ),
      .twarn                    ( twarn_135C ),
      .mode_in                  ( mode_in ),
      .clo_in                   ( clo_in_gated ),
      .scan_mode                ( top_scan_mode ),
 
      .vin_vcl_sync             ( vin_vcl_sync ),
      .vin_0p5_sync             ( vin_0p5_sync ),
      .vin_uvlo_sync            ( vin_uvlo_sync ),
      .vin_vth_sync             ( vin_vth_sync ),
      .twarn_sync               ( twarn_sync ),
      .tsd_sync                 ( tsd_sync ),
      .mode_in_sync             ( mode_in_sync ),
      .clo_in_sync              ( clo_in_sync )
);

// -----------------------------------------------------------------------------
// DEBOUNCE
// -----------------------------------------------------------------------------
 assign vin_vcl_blanked   = vin_vcl  & vin_monitor_blk;        
 assign vin_vth_blanked   = vin_vth  & vin_monitor_blk;
 assign tsd_blanked       =  tsd & ~otp_tsd_blk & ~tb_tsd_blk;

dig_comps I_dig_comps (
      .porb                     ( cp_fsm_on_scan ),      //to reset debouncers under uvlo
      .clk_3Mhz                 ( clk_333ns),
      .clk_10p6us_en            ( clk_10p6us_en ), 
      .clk_21p3us_en            ( clk_21p3us_en ),
      .clk_42p6us_en            ( clk_42p6us_en ),
      .clk_85p3us_en            ( clk_85p3us_en ),
      .clk_170p6us_en           ( clk_170p6us_en ),
      .clk_341p3us_en           ( clk_341p3us_en ),
      .clk_2p66us_en            ( clk_2p66us_en ),
      .clk_5p33us_en            ( clk_5p33us_en ),
      .scan_mode                ( top_scan_mode ),
      .vin_uvlo                 ( vin_uvlo_gated ),
      .vin_vth                  ( vin_vth_mux ),        
      .div2_dly                 ( prog_div2_dly ),
      .clo_det_done             ( clo_det_done ),
      .otp_uvlo_r_dbnc          ( otp_uvlo_r_dbnc ),
       
      .vin_uvlo_r_dbnc          ( vin_uvlo_r_dbnc ), 
      .vin_uvlo_f_dbnc          ( vin_uvlo_f_dbnc ), 
      .vin_vth_f_dbnc           ( vin_vth_f_dbnc )        
);

// -----------------------------------------------------------------------------
// CHARGE FSM
// -----------------------------------------------------------------------------
dig_cp_fsm I_dig_cp_fsm (
   .porb                        ( porb_scan ),
   .clk_3Mhz                    ( clk_333ns ),
   .clk_1p33us_en               ( clk_1p33us_en ),
   .cp_fsm_on_scan              ( cp_fsm_on_scan ),
   .otp_loaded                  ( otp_loaded ),
  
   .vin_uvlo                    ( vin_uvlo_gated ),            
   .vin_uvlo_sync               ( vin_uvlo_sync ),            
   .vin_vth_sync                ( vin_vth_sync ),
   .vin_vth_f_dbnc              ( vin_vth_f_dbnc ),
   .vin_uvlo_r_dbnc             ( vin_uvlo_r_dbnc),     
   .vin_uvlo_f_dbnc             ( vin_uvlo_f_dbnc ),
   .vin_0p5_sync                ( vin_0p5_sync ), 
   .tsd_sync                    ( tsd_sync ),
   .div2_dly                    ( prog_div2_dly ),

   .cli_present                 ( clk_ext_range_ok ),
   .clo_in                      ( clo_in_sync ),              
   .mode_in                     ( mode_in_sync ),          
            
   .tb_test_state               ( test_state ),
   .byp_wait_state              ( byp_wait_state ),
   .cp_pmos_dis                 ( otp_cp_pmos_dis ),
   
   .en_cp                       ( en_cp_twrap ),  
   .cp_pass_thru                ( cp_pass_thru_twrap ),
   .cp_tsd                      ( cp_tsd_twrap ),     
   .cp_wait                     ( cp_wait_twrap ),     
   .cp_div2                     ( cp_div2_twrap ),    
   .cp_en_pmos                  ( cp_en_pmos_twrap ),  
   .cp_state                    ( cp_state ),
   
   
   .en_refs                     ( en_refs_twrap ),    
   .en_vreg                     ( en_vreg_twrap ),    
   .en_clk_12Mhz                ( en_clk_12Mhz_twrap ),
   .en_vin_monitor              ( en_vin_monitor_twrap ),
   .en_vin_vcl                  ( en_vin_vcl_twrap ),
   .en_tsd                      ( en_tsd_twrap ),    
   .en_vldo                     ( en_vldo_twrap ),
   .en_clo_det                  ( en_clo_det_twrap ),
   .clo_det_done                ( clo_det_done ),
   .slave                       ( slave ),
   
   .cp_fsm_on                  ( cp_fsm_on ),
   .cp_fsm_exit                ( cp_fsm_exit ),
   .vin_monitor_blk            ( vin_monitor_blk ),
   .mode_out                   ( mode_out_noscan )
);



// -----------------------------------------------------------------------------
// CP CLOCKING
// -----------------------------------------------------------------------------
dig_cp_clk dig_cp_clk (
   // Inputs
   .por_b                       ( porb_scan ),
   .clk_int                     ( clk_12Mhz_scan ),
   .clk_ext                     ( cli_scan ),
   .div2_en                     ( cp_div2_twrap ),
   .clo_dis                     ( clo_dis ),
   .slave                       ( slave ),
   .otp_clo_inv                 ( otp_clo_inv ),
   .scan_mode                   ( top_scan_mode ),
   // Outputs
   .clk_cp_div2                 ( cp_clk_div2_gen ),
   .clk_cp_pt                   ( cp_clk_pass_thru_gen ),
   .clk_out                     ( cp_clo_out ),
   .clk_ext_used                ( clk_ext_used ),           ///testmux to be connected
   .clk_ext_range_ok            ( clk_ext_range_ok ),
   .n_cli                       ( n_cli )
);

// -----------------------------------------------------------------------------
// ADC 
// -----------------------------------------------------------------------------
dig_adc I_dig_adc (
//inputs
   .adc_clk_in                    ( clk_333ns ),                         
   .porb                          ( cp_fsm_on_scan ),              
   .adc_clk_freq                  ( otp_adc_clk_sel ),                
   .adc_clk1_en                   ( clk_666ns_en ),
   .adc_clk2_en                   ( clk_1p33us_en ),        //default 750khz  
   .adc_clk3_en                   ( clk_2p66us_en ),
   .adc_ext_clk                   ( cli ),               

   .i2c_conv_req                  ( i2c_req ),              //  manual or periodic    
   .owi_VIT_req                   ( owi_VIT_req ),                   
   .owi_VI_req                    ( owi_VI_req ),                    

   .adc_eoc                       ( adc_eoc ),
   .adc_data_out                  ( adc_data_out ),
   
   .i2c_chan_sel                  ( tb_adc_channel ),          
   .test_config_dft               ( tb_adc_dft_config ),                       
   .testmode                      ( test_mode_ic_wrap ),                                     
   .test_conv_start               ( mode_in ),                        
   .serial_en                     ( tb_adc_dft_config ),                      
   .scan_mode                     ( top_scan_mode ),
   .scan_en                       ( top_scan_enable ),

//outputs
   .adc_clk_en                    ( ),                   ///adc_clk_en not neccesary to request 12Mhz
   .adc_clk                       ( adc_clk ),                   
   .i2c_req_done                  ( i2c_req_done ),                         
   .owi_VIT_req_done              ( owi_VIT_req_done ),  
   .owi_VI_req_done               ( owi_VI_req_done ),
   .owi_V_conv_done               ( owi_V_conv_done ),
   .ch1_data_out_buff             ( vin_owi ),                
   .ch1_data_out                  ( vin ),                
   .ch2_data_out                  ( iin ),            
   .ch3_data_out                  ( temp ),            
   .adc_conv_en                   ( adc_enconv ),
   .en_adc                        ( en_adc_wrap ),                
   .adc_channel_mux_ctrl          ( adc_chan_mux_ctrl ),
   .test_data_out                 ( test_adc_data_out ),
   .serial_data                   ( serial_data ),                                                         
   .serial_frame                  ( )                              
);

assign adc_az_dis_wrap = tb_adc_az_dis | otp_adc_az_dis;

assign adc_signed_conv = ~test_mode_ic | tb_adc_signed  ;   

assign adc_hold_delay = tb_adc_hold_delay ;   // 64 x 750khz= 85us by default

assign en_vin_meter_twrap = en_adc_wrap;
assign en_iin_meter_twrap = en_adc_wrap;

assign adc_manual = adc_manual_reg | slave;
// -----------------------------------------------------------------------------
// ADC
// -----------------------------------------------------------------------------
dig_adc_req_gen I_dig_adc_req_gen (
      .reset_b                  ( cp_fsm_on_scan ),        ///porb_scan
      .clk_3Mhz                 ( clk_333ns),
      .clk_42p6us_en            ( clk_42p6us_en ),
      .clk_85p3us_en            ( clk_85p3us_en ),
      .clk_170p6us_en           ( clk_170p6us_en ),
      .clk_682p6us_en           ( clk_682p6us_en ),
      .i2c_sel                  ( i2c_sel ),
      .conv_period              ( conv_period ),
      .manual_mode              ( adc_manual ),
      .i2c_man_req              ( i2c_man_req ),
      .i2c_req_done             ( i2c_req_done ),
      
      .i2c_req                 ( i2c_req ),
      .adc_manual_rstb         ( adc_manual_rstb )              
);

dig_adc_buf I_dig_adc_buf (
   // Inputs
   .reset_b                     ( porb_scan ),
   .clk_12Mhz                   ( clk_12Mhz_scan ),
   .i2c_load_adc                ( i2c_load_adc ),
   .ch1_data_out                ( vin ),
   .ch2_data_out                ( iin ),
   .ch3_data_out                ( temp ),
   .scan_en                     ( top_scan_enable ),

   // Outputs
   .ch1_data_buf                ( vin_buf ),
   .ch2_data_buf                ( iin_buf ),
   .ch3_data_buf                ( temp_buf )
);

// -----------------------------------------------------------------------------
// OWI
// -----------------------------------------------------------------------------
dig_owi I_dig_owi (
      .reset_b                  ( porb_scan ),
      .SDA_in                   ( sda_owi ),
      .clk_12Mhz                ( clk_12Mhz_scan ),
      .clk_32khz                ( scl_owi ),                /// scl not used as a clock    
      .scan_clk                 ( scan_clk ), 
      .prog_ib_delay            ( prog_ib_dly ), 
      .otp_no_tx_resync         ( otp_no_tx_resync ),              
      .otp_no_rx_resync         ( otp_no_rx_resync ),              
      .owi_VIT_done_rstb        ( owi_VIT_done_rstb ),
      .owi_VI_done_rstb         ( owi_VI_done_rstb ),
      .read_data_oca_stat       ( read_data_oca_stat ),
      .read_data_ova_stat       ( read_data_ova_stat ),
      .read_data_ota_stat       ( read_data_ota_stat ),
      .read_data_com_er_stat    ( read_data_com_er_stat ),
      .read_data_chg_ok_stat    ( read_data_chg_ok_stat ),
      .read_data_vin_msb        ( read_data_vin_msb ),
      .read_data_vin_lsb        ( read_data_vin_lsb ),
      .read_data_iin_msb        ( read_data_iin_msb ),
      .read_data_iin_lsb        ( read_data_iin_lsb ),
      .read_data_temp_msb       ( read_data_temp_msb ),
      .read_data_temp_lsb       ( read_data_temp_lsb ),
      .read_data_vth            ( read_data_vth ),
      .read_data_vcl            ( read_data_vcl ),
      .read_data_div2_dly       ( read_data_div2_dly ),
      .read_data_clo_dis        ( read_data_clo_dis ),
      .read_data_n_cli          ( read_data_n_cli ),
      .read_data_mode_m         ( read_data_mode_m ),
      .read_data_ib_dly         ( read_data_ib_dly ),
      .read_data_pwr_ok         ( read_data_pwr_ok ),
      .read_data_tsd_int        ( read_data_tsd_int ),
      .read_data_com_er_int     ( read_data_com_er_int ),
      .read_data_ota_int        ( read_data_ota_int ),
      .read_data_ova_int        ( read_data_ova_int ),
      .read_data_oca_int        ( read_data_oca_int ),
      .read_data_rev_id         ( read_data_rev_id ), 
      .adc_data_rdy             ( owi_V_conv_done ),          
      .scan_mode                ( top_scan_mode ),   
   
      .SDA_out                  ( sda_out_owi ),
      .WR                       ( owi_WR ),
      .RD                       ( owi_RD ),
      .adc_VIT_req              ( owi_VIT_req ),
      .adc_VI_req               ( owi_VI_req ),
      .reg_en                   ( owi_reg_en ),
      .com_er                   ( com_er ),
      .rx_clk                   ( rx_clk ),
      .tx_clk                   ( tx_clk ),
      .ib_delay                 ( ib_delay ),
      .owi_cmd                  (  ),                    ///to be removed
      .write_data_vth           ( write_data_vth ),
      .write_data_vcl           ( write_data_vcl ),
      .write_data_div2_dly      ( write_data_div2_dly ),
      .write_data_clo_dis       ( write_data_clo_dis ),
      .write_data_ib_dly        ( write_data_ib_dly ),
      .write_data_pwr_ok        ( write_data_pwr_ok )
);

assign scl_owi = (i2c_sel) ? 1'b1 : scl_scan;        
assign sda_owi = (i2c_sel) ? 1'b1 : sda;

// -----------------------------------------------------------------------------
// OWI REGS
// -----------------------------------------------------------------------------
assign oca = &iin;

dig_regs_owi I_dig_regs_owi (
      .write_data_vth         ( write_data_vth ),
      .write_data_vcl         ( write_data_vcl ),
      .write_data_div2_dly    ( write_data_div2_dly ),
      .write_data_clo_dis     ( write_data_clo_dis ),
      .write_data_ib_dly      ( write_data_ib_dly ),
      .write_data_pwr_ok      ( write_data_pwr_ok ),

      .WR                     ( owi_WR_scan ),
      .RD                     ( owi_RD ),
      .WR_fuse_rrst_noff      ( owi_WR_fuse_rrst_noff_scan ),
      .WR_fuse_rrst_noff_load ( WR_fuse_rrst_noff_load),
      .reg_en                 ( owi_reg_en ),

      .oca_stat               ( owi_oca_int_out ),
      .ota_stat               ( owi_ota_int_out ),
      .ova_stat               ( owi_ova_int_out ),
      .chg_ok                 ( chg_ok ),
      .com_er_stat            ( com_er_int_out ),

      .vin                    ( vin_owi ),       
      .iin                    ( iin ),
      .temp                   ( temp ),
      .otp_vth                ( otp_vth ),
      .otp_div2_dly           ( otp_div2_dly ),

      .n_cli                  ( n_cli ),
      .mode_m                 ( mode_out_noscan ),    //sense of mode pin
      .tsd_int                ( tsd_sync ),
      .oca_int                ( oca ),
      .ota_int                ( twarn_sync ),
      .com_er_int             ( com_er ),
      .ova_int                ( vin_vcl_blanked ),
      .rev_id                 ( rev_id ),          

      .rrst_noff              ( rrst_noff ),          
      .rrst_off               ( rrst_off ),
      .fuse_rrst_noff         ( porb_scan ), 
      .read_en                ( 1'b0 ),
      .scan_mode              ( top_scan_mode ),
      .scan_clk               ( scan_clk ),

      .tsd_int_out            (  ),
      .oca_int_out            ( owi_oca_int_out ),
      .ota_int_out            ( owi_ota_int_out ),
      .ova_int_out            ( owi_ova_int_out ),
      .com_er_int_out         ( com_er_int_out ),

      .vth                    ( prog_vth_owi ),
      .vcl                    ( prog_vcl_owi ),
      .div2_dly               ( prog_div2_dly_owi ),
      .clo_dis                ( clo_dis_owi ),
      .pwr_ok                 ( pwr_ok_owi ),
      .ib_dly                 ( prog_ib_dly ),
   
      .read_data_oca_stat     ( read_data_oca_stat ),
      .read_data_ova_stat     ( read_data_ova_stat ),
      .read_data_ota_stat     ( read_data_ota_stat ),
      .read_data_com_er_stat  ( read_data_com_er_stat ),
      .read_data_chg_ok_stat  ( read_data_chg_ok_stat ),
      .read_data_vin_msb      ( read_data_vin_msb ),
      .read_data_vin_lsb      ( read_data_vin_lsb ),
      .read_data_iin_msb      ( read_data_iin_msb ),
      .read_data_iin_lsb      ( read_data_iin_lsb ),
      .read_data_temp_msb     ( read_data_temp_msb ),
      .read_data_temp_lsb     ( read_data_temp_lsb ),
      .read_data_vth          ( read_data_vth ),
      .read_data_vcl          ( read_data_vcl) ,
      .read_data_div2_dly     ( read_data_div2_dly ),
      .read_data_clo_dis      ( read_data_clo_dis ),
      .read_data_n_cli        ( read_data_n_cli ),
      .read_data_mode_m       ( read_data_mode_m ),
      .read_data_ib_dly       ( read_data_ib_dly ),
      .read_data_pwr_ok       ( read_data_pwr_ok ),
      .read_data_tsd_int      ( read_data_tsd_int ),
      .read_data_com_er_int   ( read_data_com_er_int ),
      .read_data_ota_int      ( read_data_ota_int ),
      .read_data_ova_int      ( read_data_ova_int ),
      .read_data_oca_int      ( read_data_oca_int ),
      .read_data_rev_id       ( read_data_rev_id )
 );
                           

// -----------------------------------------------------------------------------
// I2C
// -----------------------------------------------------------------------------
assign IC_address = {3'b001,otp_i2c_add,2'b00};
dig_i2c I_dig_i2c (
      .reset_b                     ( porb_scan ),
      .SDA_in                      ( sda_i2c ),
      .scan_mode                   ( top_scan_mode ),
      .SCL                         ( scl_i2c ),
      .IC_ADR                      ( IC_address ),  
      .read_bus                    ( i2c_read_bus ),
      .read_ibus                   ( iin_buf ),
      .addr_ibus                   ( 8'd2 ),
 
      .SDA_out                     ( sda_out_i2c ),
      .RD                          ( i2c_RD ),
      .WR                          ( i2c_WR ),
      .i2c_load_adc                ( i2c_load_adc ),
      .high_speed                  ( i2c_high_speed ),
      .addr_bus                    ( i2c_addr_bus ),
      .write_bus                   ( i2c_write_bus )
);

assign scl_i2c = (i2c_sel) ?  scl_scan : 1'b1;         
assign sda_i2c = (i2c_sel) ?  sda : 1'b1;

// -----------------------------------------------------------------------------
// I2C REGS
// -----------------------------------------------------------------------------
 dig_regs I_dig_regs (

//**inputs
    .addr_bus                    ( i2c_addr_bus ),
    .write_bus                   ( i2c_write_bus ),
    .RD                          ( i2c_RD ),
    .WR                          ( i2c_WR_scan ),
    .WR_noscan                   ( i2c_WR_noscan ),
    .WR_fuse_rrst_noff           ( i2c_WR_fuse_rrst_noff_scan ),
    .WR_fuse_rrst_noff_load      ( WR_fuse_rrst_noff_load),
    
    .test_mode                   ( test_mode_ic_wrap ),
    .test_mode_sns               ( test_mode_ic_wrap ),
    .scan_mode                   ( top_scan_mode ),
    .scan_clk                    ( scan_clk ),
    .cp_state                    ( cp_state ),      
        
    .otp_reg_hrst                ( otp_reg_hrst),
    .porb_scan                   ( porb_scan ),
    .porb_noscan                 ( porb ),
    .rrst_off                    ( rrst_off ),
    .rrst_noff                   ( rrst_noff ),       
    .fuse_rrst_noff              ( porb_scan ),  
    .done_rstb                   ( i2c_done_rstb ),

    .read_en                     ( readback ),
    .otp                         ( otp ),
    .otp_vth                     ( otp_vth ),
    .otp_div2_dly                ( otp_div2_dly ),
    .otp_conv_period             ( otp_conv_period ),
    .otp_vldo                    ( otp_vldo ),        

    .ildo_int                    ( ldo_oc ),                ///no debounce, sync, blank ??
    .oca_int                     ( oca ),                  
    .ota_int                     ( twarn_sync ),            
    .vth_int                     ( mode_out_noscan ),                  
    .ova_int                     ( vin_vcl_blanked ),               
    .adc_eoc_int                 ( i2c_req_done ),          
    .tsd_int                     ( tsd_sync ),
    .chg_ok_int                  ( chg_ok ),             ///no debounce, sync, blank ??
    
    .ildo_stat                   ( i2c_ildo_int_out ),
    .vth_stat                    ( i2c_vth_int_out),
    .oca_stat                    ( i2c_oca_int_out ), 
    .ota_stat                    ( i2c_ota_int_out ), 
    .ova_stat                    ( i2c_ova_int_out ), 
    .tsd_stat                    ( i2c_tsd_int_out ), 
    .adc_eoc_stat                ( i2c_adc_eoc_int_out),
    .chg_ok_stat                 ( i2c_chg_ok_int_out ), 
    
    .ildo_sns                    ( ldo_oc ), 
    .vth_sns                     ( mode_out_noscan ),    //sense of mode pin
    .tsd_sns                     ( tsd ), 
    .oca_sns                     ( oca ),       
    .ota_sns                     ( twarn_135C ),
    .ova_sns                     ( vin_vcl ),       
    .adc_eoc_sns                 ( en_adc_wrap ),       
    .chg_ok_sns                  ( chg_ok ),
 
    .vin                         ( vin_buf ),   
    .iin                         ( iin_buf ),   
    .temp                        ( temp_buf ),  
    
    .adc_data_sign               ( test_adc_data_out[10] ),
    .adc_data_msb                ( test_adc_data_out[9:3] ),
    .adc_data_lsb                ( test_adc_data_out[2:0] ),

    .n_cli                       ( n_cli ),          
                   
    .rev_id                      ({2'b00, rev_id}),     
    
//**outputs
    .reg_en                      ( reg_en ),
    .i2c_access                  ( i2c_access ),

    .ildo_int_out                ( i2c_ildo_int_out ),
    .vth_int_out                 ( i2c_vth_int_out ),
    .oca_int_out                 ( i2c_oca_int_out ), 
    .ota_int_out                 ( i2c_ota_int_out ),
    .ova_int_out                 ( i2c_ova_int_out ),      
    .adc_eoc_int_out             ( i2c_adc_eoc_int_out ),
    .tsd_int_out                 ( i2c_tsd_int_out ), 
    .chg_ok_int_out              ( i2c_chg_ok_int_out ),
    
    .clo_dis                     ( clo_dis_i2c ),      
    .pwr_ok                      ( pwr_ok_i2c ),      
    .conv_period                 ( conv_period ),      
    .div2_dly                    ( prog_div2_dly_i2c ),    
    .vcl                         ( prog_vcl_i2c ),
    .vth                         ( prog_vth_i2c ),
    .vldo                        ( prog_vldo ), 
    .adc_manual                  ( adc_manual_reg ),          
    .adc_request                 ( i2c_man_req ),
   
    .scan_mode_sel               ( scan_mode_sel ), 
    .test_state                  ( test_state ),
    .fast_clk                    ( fast_clk ),
    
    .tb_adc_dft_config           ( tb_adc_dft_config ),
    .tb_adc_signed               ( tb_adc_signed ),
    .tb_adc_channel              ( tb_adc_channel ),
    .tb_adc_ext_vref             ( tb_adc_ext_vref ),       
    .tb_adc_az_dis               ( tb_adc_az_dis ),
    .tb_adc_hold_delay           ( tb_adc_hold_delay ),
    
    .dig_mux                     ( dig_mux ),     
    .tb_digmux_clo               ( tb_digmux_clo ),
    .en_test_mux1                ( en_test_mux1_wrap ),
    .en_test_mux2                ( en_test_mux2_wrap ),
    .test_mux1_ctrl              ( test_mux1_ctrl_wrap ),
    .test_mux2_ctrl              ( test_mux2_ctrl_wrap ),
    .tb_tsd_blk                  ( tb_tsd_blk ),
    .tb_no_wait_state            ( tb_no_wait_state ),
    .tb_en_fuse_curr_sink        ( tb_en_fuse_curr_sink ),
    .tb_no_ldo_ishort            ( tb_no_ldo_ishort ),
    .tb_vldo_dischg_dis          ( tb_vldo_dischg_dis ),
    .tb_clk_pt_dis               ( tb_clk_pt_dis ),
    .tb_clk_div2                 ( tb_clk_div2 ),
    .tb_force_clo_in             ( tb_force_clo_in ),
    .tb_force_uvlob              ( tb_force_uvlob ),
    .tb_refs                     ( tb_refs ),
    .tb_osc_byp                  ( tb_osc_byp ),
    .tb_force_vref_startup       ( force_vref_startup_wrap ),
    .tb_spare1                   ( tb_spare1 ),
    .tb_spare2                   ( tb_spare2 ),
          
    .en_output_wrapper           ( en_out_dig_mgnt ),    
    .wrap_clk_12Mhz_en           ( wrap_en_clk_12Mhz ),           
    .wrap_en_cp                  ( wrap_en_cp ),                  
    .wrap_en_tsd                 ( wrap_en_tsd ),
    .wrap_en_vin_monitor         ( wrap_en_vin_monitor ),
    .wrap_en_vin_vcl             ( wrap_en_vin_vcl ),
    .wrap_en_clo_det             ( wrap_en_clo_det ),
    .wrap_en_vldo                ( wrap_en_vldo ),
    .wrap_cp_pass_thru           ( wrap_cp_pass_thru ),
    .wrap_cp_tsd                 ( wrap_cp_tsd ),
    .wrap_cp_wait                ( wrap_cp_wait ),
    .wrap_cp_div2                ( wrap_cp_div2 ),
    .wrap_cp_en_pmos             ( wrap_cp_en_pmos ),
    .wrap_en_vin_meter           ( wrap_en_vin_meter ),
    .wrap_en_iin_meter           ( wrap_en_iin_meter ),
    .en_fuse_bypass              ( en_fuse_bypass ),
    .cursen                      ( {otp_cursen1_1,otp_cursen0_1} ),
    .readback                    ( readback ),
    .re_latch                    ( re_latch ),
    .sw                          ( soft_write ),
    .hw                          ( hard_write ),    
    .otp_sel                     ( otp_sel ),
    .read_bus                    ( i2c_read_bus ),
    .otp_reg                     ( otp_reg ),
    .otp_emul_zero               ( otp_emul_zero )    
 );


// -----------------------------------------------------------------------------
// OWI/I2C mux
// -----------------------------------------------------------------------------
assign i2c_sel = sel_in | slave | test_mode_ic; 

assign prog_vth      = ( i2c_sel ) ?  prog_vth_i2c       : prog_vth_owi;
assign prog_vcl      = ( i2c_sel ) ?  prog_vcl_i2c       : prog_vcl_owi;
assign prog_div2_dly = ( i2c_sel ) ?  prog_div2_dly_i2c  : prog_div2_dly_owi;
assign pwr_ok        = ( i2c_sel ) ?  pwr_ok_i2c         : pwr_ok_owi;
assign clo_dis       = ( i2c_sel ) ?  clo_dis_i2c        : clo_dis_owi ;

assign sda_out_wrap  = ( i2c_sel ) ?  sda_out_i2c        : sda_out_owi;

// -----------------------------------------------------------------------------
// OTP
// -----------------------------------------------------------------------------
dig_otp I_dig_otp (
   .clk_333ns                  ( clk_333ns ),
   .clk_666ns_en              ( clk_666ns_en ),
   .vcore_rdy                 ( cp_fsm_on_scan ),  
   
   .hard_write                  ( hard_write ),
   .soft_write                  ( soft_write ),
   .otp_sel                     ( otp_sel ),
   .re_latch                    ( re_latch ),
   
   .data_write                  ( otp_reg ),
   .otp_memvalid                ( otp_memvalid_1 ),
   
   .tb_sftrst_en                ( otp_emul_zero ),
   .tb_otp_cnt                  ( 1'b0 ),
   
   .scan_mode                   ( top_scan_mode ),
   .scan_en                     ( top_scan_enable ),
   
   .otp_lat                     ( otp_lat_1 ),
   .otp_sensez                  ( otp_sensez_1 ),
   .otp_sftrst                  ( otp_sftrst_1 ),
   .otp_sftset                  ( otp_sftset_1 ),
   .otp_reset                   ( otp_reset_1 ),
   .otp_prog                    ( otp_prog_1 ),
   .otp_clk                     ( otp_clk_1 ),
   
   .otp_loaded                  ( otp_loaded ),
   .otp_cmd_clr                 ( otp_cmd_clr ),
   .otp_clk_en                  (  )            
);

// -----------------------------------------------------------------------------
// OTP MAPPING
// -----------------------------------------------------------------------------
dig_map_otp I_dig_map_otp (
   // Inputs
   .otp                    ( otp ),          
   .otp_loaded             ( otp_loaded ),
   
   .otp_vldo               ( otp_vldo ),     
   .otp_div2_dly           ( otp_div2_dly ),     
   .otp_conv_period        ( otp_conv_period ),
   .otp_vth                ( otp_vth ),
   .otp_tsd_blk            ( otp_tsd_blk ),
   .otp_i2c_add            ( otp_i2c_add ),   
   .otp_testbits_open      ( otp_testbits_open ),
   .otp_no_wait_state      ( otp_no_wait_state ),
   .otp_force_uvlob        ( otp_force_uvlob ),
   .otp_cp_pmos_dis        ( otp_cp_pmos_dis ),
   .otp_pseudo_master      ( otp_pseudo_master ),
   .otp_osc_byp            ( otp_osc_byp ),
   .otp_uvlo_r_dbnc        ( otp_uvlo_r_dbnc ),
   .otp_adc_az_dis         ( otp_adc_az_dis ),                         
   .otp_no_tx_resync       ( otp_no_tx_resync ),
   .otp_no_rx_resync       ( otp_no_rx_resync ),
   .otp_clo_inv            ( otp_clo_inv ),
   .otp_adc_clk_sel        ( otp_adc_clk_sel )
);

// -----------------------------------------------------------------------------
// TEST MODE
// -----------------------------------------------------------------------------
// write '17','51'in register 126  to enter testmode
// write '17','51'in register 127 to exit testmode
// to be validated when test mapping available

always @ (posedge i2c_WR_scan or negedge porb_scan ) begin 
    if (!porb_scan ) begin
       test_mode_tmp <= 1'b0;
       test_mode_reg <= 1'b0;
    end
    // Test mode (tmp) for entering
   else if (reg_en[126] && (i2c_write_bus == 8'h17) && !test_mode_reg) begin 
       test_mode_tmp <= 1'b1;
    end
    // Test mode (tmp) for exiting
    else if (reg_en[127]  && (i2c_write_bus == 8'h17) &&  test_mode_reg) begin 
       test_mode_tmp <= 1'b1;
    end
    // Test mode enter
    else if (reg_en[126] && (i2c_write_bus == 8'h51) && test_mode_tmp && !test_mode_reg) begin 
       test_mode_reg <= 1'b1;
       test_mode_tmp <= 1'b0;
    end
  // Test mode exit
    else if (reg_en[127]  && (i2c_write_bus == 8'h51) && test_mode_tmp && test_mode_reg) begin 
       test_mode_reg <= 1'b0;
       test_mode_tmp <= 1'b0;
    end
end

assign test_mode_ic_wrap = test_mode_reg | otp_testbits_open;

// -----------------------------------------------------------------------------
// SCAN
// -----------------------------------------------------------------------------
assign clo_out_adc = ( tb_adc_dft_config ) ? serial_data : cp_clo_out;

dig_scan_ctl I_dig_scan_ctl (
  .scan_mode_sel               ( scan_mode_sel ),      ///only one bit
  .scan_en_pin                 ( chg_ok_in ),
  .scan_clk_pin                ( scl ), 
  .scan_rstb_pin               ( sel_in ), 
  .scan_in_pin1                ( sda ),
  .scan_in_pin2                ( cli ),
   
  .top_scan_data_out1          (  ),               //for lec: anticipate last flop connected scan_data_out
  .top_scan_data_out2          (  ),               //for lec: anticipate last flop connected scan_data_out
  .top_scan_out_noscan_pin1    ( mode_out_noscan ), 
  .top_scan_out_noscan_pin2    ( clo_out_noscan ),
  
  .scan_mode_ic                ( scan_mode_ic ),
  .top_scan_mode               ( top_scan_mode ),
  .top_scan_enable             ( top_scan_enable ),
  .scan_clk                    ( scan_clk ),
  .scan_rstb                   ( scan_rstb ),
  .top_scan_data_in1           ( ),                //connected in synthesis
  .top_scan_data_in2           ( ),                //connected in synthesis  
  .top_scan_out_pin1           ( mode_out ),
  .top_scan_out_pin2           ( clo_out )
                                 
);

// -----------------------------------------------------------------------------
// TEST_MUX
// -----------------------------------------------------------------------------
dig_test_mux I_dig_test_mux (
   .dig_mux                     ( dig_mux ),
   .flag_polarity               ( 1'b0 ),        
   .flag_int                    ( 1'b0 ),          
   .in1_test                    ( tsd ),         
   .in2_test                    ( vin_uvlo ),       
   .in3_test                    ( vin_vth ),        
   .in4_test                    ( vin_0p5 ),       
   .in5_test                    ( vin_vcl ),       
   .in6_test                    ( ldo_oc ),   
   .in7_test                    ( ldo_rdy ),    
   .in8_test                    ( slave ),          
   .in9_test                    ( en_cp ),         
   .in10_test                   ( cp_pass_thru ),      
   .in11_test                   ( cp_tsd ),      
   .in12_test                   ( cp_wait ),      
   .in13_test                   ( cp_div2 ),                                        
   .in14_test                   ( cp_en_pmos ), 
   .in15_test                   ( cp_clk_pass_thru ), 
   .in16_test                   ( cp_clk_div2 ),        
   .in17_test                   ( adc_clk ),       
   .in18_test                   ( adc_enconv ),                     
   .in19_test                   ( adc_eoc),      
   .in20_test                   ( adc_outcomp ),       
   .in21_test                   ( adc_startb ),     
   .in22_test                   ( adc_hold ),           
   .in23_test                   ( cli ),       
   .in24_test                   ( sel_in ),        
   .in25_test                   ( clo_in ),    
   .in26_test                   ( mode_in ),          
   .in27_test                   ( chg_ok_in ),          
   .in28_test                   ( adc_busy ),        
   .in29_test                   ( twarn_135C ),
   .in30_test                   ( twarn_125C ),
   .in31_test                   ( vddi2c_detect ),
   .in32_test                   ( otp_prog_1 ),     
   .in33_test                   ( en_vreg ),
   .in34_test                   ( en_refs ),
   .in35_test                   ( en_clk_12Mhz ),
   .in36_test                   ( en_clo_det ),
   .in37_test                   ( en_vin_monitor ),
   .in38_test                   ( en_vin_vcl ),
   .in39_test                   ( en_vldo ),
   .in40_test                   ( en_vin_meter ),
   .in41_test                   ( en_iin_meter ),
   .in42_test                   ( en_fuse_bypass ),
   .in43_test                   ( en_tsd ),
   .in44_test                   ( en_adc ),
   .in45_test                   ( clk_ext_used ),
   .in46_test                   ( clk_ext_range_ok ), 
   .in47_test                   ( com_er ),
   .in48_test                   ( rx_clk ),
   .in49_test                   ( tx_clk ),
   .in50_test                   ( ib_delay ),
   .in51_test                   ( 1'b0 ),
   .in52_test                   ( 1'b0 ),
   .in53_test                   ( 1'b0 ),
   .in54_test                   ( 1'b0 ),
   .in55_test                   ( 1'b0 ),
   .in56_test                   ( 1'b0 ),
   .in57_test                   ( 1'b0 ),
   .in58_test                   ( 1'b0 ),
   .in59_test                   ( 1'b0 ),
   .in60_test                   ( 1'b0 ),
   .in61_test                   ( 1'b0 ),
   .in62_test                   ( 1'b0 ),
   .in63_test                   ( 1'b0 ),
              
   .dig_mux_on                  (  ),
   .flag                        ( dig_mux_out )  
);

assign clo_out_noscan = ( tb_digmux_clo ) ? dig_mux_out : clo_out_adc;

// -----------------------------------------------------------------------------
// TEST WRAPPER
// -----------------------------------------------------------------------------
dig_test_wrapper I_dig_test_wrapper (
   // Inputs
   .en_out_dig_mgnt             ( en_out_dig_mgnt ), 
   .wrap_en_tsd                 ( wrap_en_tsd ), 
   .wrap_en_clk_12Mhz           ( wrap_en_clk_12Mhz ),
   .wrap_en_vin_monitor         ( wrap_en_vin_monitor ),
   .wrap_en_vin_vcl             ( wrap_en_vin_vcl ),
   .wrap_en_vldo                ( wrap_en_vldo ), 
   .wrap_en_clo_det             ( wrap_en_clo_det ),
   .wrap_en_cp                  ( wrap_en_cp ),
   .wrap_cp_pass_thru           ( wrap_cp_pass_thru ),
   .wrap_cp_tsd                 ( wrap_cp_tsd ),
   .wrap_cp_wait                ( wrap_cp_wait ),
   .wrap_cp_div2                ( wrap_cp_div2 ),
   .wrap_cp_en_pmos             ( wrap_cp_en_pmos ),   
   .wrap_en_vin_meter           ( wrap_en_vin_meter ),   
   .wrap_en_iin_meter           ( wrap_en_iin_meter ),    
       
   .en_vreg_twrap               ( en_vreg_twrap ),
   .en_refs_twrap               ( en_refs_twrap ),
   .en_tsd_twrap                ( en_tsd_twrap ),
   .en_clk_12Mhz_twrap          ( en_clk_12Mhz_twrap ),
   .en_vin_monitor_twrap        ( en_vin_monitor_twrap ),
   .en_vin_vcl_twrap            ( en_vin_vcl_twrap ),          ///to be connected
   .en_vldo_twrap               ( en_vldo_twrap ),
   .en_clo_det_twrap            ( en_clo_det_twrap ),
   .en_cp_twrap                 ( en_cp_twrap ),
   .cp_pass_thru_twrap          ( cp_pass_thru_twrap ),
   .cp_tsd_twrap                ( cp_tsd_twrap ),
   .cp_wait_twrap               ( cp_wait_twrap ),
   .cp_div2_twrap               ( cp_div2_twrap ),
   .cp_en_pmos_twrap            ( cp_en_pmos_twrap ),
   .en_vin_meter_twrap          ( en_vin_meter_twrap ),
   .en_iin_meter_twrap          ( en_iin_meter_twrap ),
            
   // Outputs
   .en_vreg                     ( en_vreg_wrap ),
   .en_refs                     ( en_refs_wrap ),
   .en_tsd                      ( en_tsd_wrap ),
   .en_clk_12Mhz                ( en_clk_12Mhz_wrap ),
   .en_vldo                     ( en_vldo_wrap ),
   .en_clo_det                  ( en_clo_det_wrap ),   
   .en_vin_monitor              ( en_vin_monitor_wrap ),
   .en_vin_vcl                  ( en_vin_vcl_wrap ),  
   .en_cp                       ( en_cp_wrap ),
   .cp_pass_thru                ( cp_pass_thru_wrap ),
   .cp_tsd                      ( cp_tsd_wrap ),
   .cp_wait                     ( cp_wait_wrap ),
   .cp_div2                     ( cp_div2_wrap ),
   .cp_en_pmos                  ( cp_en_pmos_wrap ),
   .en_vin_meter                ( en_vin_meter_wrap ),   
   .en_iin_meter                ( en_iin_meter_wrap )        
    );

// -----------------------------------------------------------------------------
// SCAN WRAPPER
// -----------------------------------------------------------------------------
assign en_cpb_wrap = ~en_cp_wrap;

dig_scan_wrapper I_dig_scan_wrapper (
// Inputs
   .scan_mode                     ( top_scan_mode ),
// 
// Outputs
   .en_vin_monitor                ( en_vin_monitor ),
   .en_vin_monitor_wrap           ( en_vin_monitor_wrap ),
   .en_vin_vcl                    ( en_vin_vcl ),
   .en_vin_vcl_wrap               ( en_vin_vcl_wrap ),      
   .en_vreg                       ( en_vreg ),
   .en_vreg_wrap                  ( en_vreg_wrap ),
   .en_refs                       ( en_refs ),
   .en_refs_wrap                  ( en_refs_wrap ),
   .en_cp                         ( en_cp ),
   .en_cp_wrap                    ( en_cp_wrap ),
   .en_cpb                        ( en_cpb ),
   .en_cpb_wrap                   ( en_cpb_wrap ),   
   .en_tsd                        ( en_tsd ),
   .en_tsd_wrap                   ( en_tsd_wrap ),
   .en_clk_12Mhz                  ( en_clk_12Mhz ),
   .en_clk_12Mhz_wrap             ( en_clk_12Mhz_wrap ),
   .en_vldo                       ( en_vldo ),
   .en_vldo_wrap                  ( en_vldo_wrap ),
   .en_clo_det                    ( en_clo_det ),
   .en_clo_det_wrap               ( en_clo_det_wrap ),
   .cp_pass_thru                  ( cp_pass_thru ),
   .cp_pass_thru_wrap             ( cp_pass_thru_wrap ),
   .cp_tsd                        ( cp_tsd ),
   .cp_tsd_wrap                   ( cp_tsd_wrap ),
   .cp_wait                       ( cp_wait ),
   .cp_wait_wrap                  ( cp_wait_wrap ),
   .cp_div2                       ( cp_div2 ),
   .cp_div2_wrap                  ( cp_div2_wrap ),
   .cp_en_pmos                    ( cp_en_pmos),
   .cp_en_pmos_wrap               ( cp_en_pmos_wrap ),
   .cp_clk_div2                   ( cp_clk_div2 ),  
   .cp_clk_div2_wrap              ( cp_clk_div2_wrap ),  
   .cp_clk_pass_thru              ( cp_clk_pass_thru ),
   .cp_clk_pass_thru_wrap         ( cp_clk_pass_thru_wrap ),
   .en_vin_meter                  ( en_vin_meter ),
   .en_vin_meter_wrap             ( en_vin_meter_wrap ),
   .en_iin_meter                  ( en_iin_meter ),  
   .en_iin_meter_wrap             ( en_iin_meter_wrap ),        
   .en_adc                        ( en_adc ),
   .en_adc_wrap                   ( en_adc_wrap ),
   .adc_az_dis                    ( adc_az_dis ),
   .adc_az_dis_wrap               ( adc_az_dis_wrap ),  
   .adc_ext_vref                  ( adc_ext_vref ),
   .adc_ext_vref_wrap             ( tb_adc_ext_vref ),   
   .en_test_mux1                  ( en_test_mux1 ),
   .en_test_mux1_wrap             ( en_test_mux1_wrap ),
   .en_test_mux2                  ( en_test_mux2 ),
   .en_test_mux2_wrap             ( en_test_mux2_wrap ),   
   .test_mux1_ctrl                ( test_mux1_ctrl ),
   .test_mux1_ctrl_wrap           ( test_mux1_ctrl_wrap ),
   .test_mux2_ctrl                ( test_mux2_ctrl ),
   .test_mux2_ctrl_wrap           ( test_mux2_ctrl_wrap ), 
   .vldo_en_dischg                ( vldo_en_dischg ),
   .vldo_en_dischg_wrap           ( vldo_en_dischg_wrap ),
   .test_mode_ic                  ( test_mode_ic ),
   .test_mode_ic_wrap             ( test_mode_ic_wrap ),
   .sda_out_wrap                  ( sda_out_wrap ),         
   .sda_out                       ( sda_out ),
   .ch_ok_pullup_dis_wrap         ( ch_ok_pullup_dis_wrap ),
   .ch_ok_pullup_dis              ( ch_ok_pullup_dis ),
   .force_uvlob_wrap              ( force_uvlob_wrap ),
   .force_uvlob                   ( force_uvlob ),
   .force_vref_startup_wrap       ( force_vref_startup_wrap ),
   .force_vref_startup            ( force_vref_startup)
 );
// -----------------------------------------------------------------------------
// CHG_OK
// -----------------------------------------------------------------------------
assign chg_ok = chg_ok_out & chg_ok_in;
assign chg_ok_out    = ( scan_mode_ic ) ? 1'b1 : (vin_uvlo_gated & pwr_ok) | ch_ok_pullup_dis_wrap;
assign chg_ok_in_en  = ( scan_mode_ic ) ? 1'b1 : vin_uvlo_gated;
assign ch_ok_pullup_dis_wrap = en_test_mux1_wrap | en_test_mux2_wrap | tb_adc_ext_vref; 

// -----------------------------------------------------------------------------
// PIN CONTROL & TEST BITS
// -----------------------------------------------------------------------------
assign mode_out_en = ( scan_mode_ic ) ? 1'b1 : ~tb_adc_dft_config & ~otp_pseudo_master & en_vldo ;
assign mode_in_en = ( scan_mode_ic ) ? 1'b0 : vin_uvlo_gated & ~mode_out_en;

assign clo_out_en = ( scan_mode_ic ) ? 1'b1 : ~en_clo_det & en_vldo;
assign clo_in_gated = tb_force_clo_in | clo_in;
assign clo_in_en = ( scan_mode_ic ) ? 1'b0 : vin_uvlo_gated & ~clo_out_en; 

assign cli_in_en = ( scan_mode_ic ) ? 1'b1 : porb;

assign sel_out = test_mode_ic & ~tb_digmux_clo & dig_mux_out;
assign sel_out_en = ( scan_mode_ic ) ? 1'b0 : test_mode_ic ;
assign sel_in_en =  ( scan_mode_ic ) ? 1'b1 : porb;


assign vldo_en_dischg_wrap = ~en_vldo & ~tb_vldo_dischg_dis;

assign cp_clk_pass_thru_wrap =  cp_clk_pass_thru_gen & ~tb_clk_pt_dis;

assign force_uvlob_wrap = tb_force_uvlob | otp_force_uvlob;
assign vin_uvlo_gated = vin_uvlo | force_uvlob_wrap;

assign clk_12Mhz_int = ( tb_osc_byp || otp_osc_byp ) ? cli : clk_12Mhz;

assign vin_vth_mux   = ( otp_pseudo_master ) ?  mode_in : vin_vth_blanked;

assign byp_wait_state = tb_no_wait_state | otp_no_wait_state;

always @ (*) begin
   case ( tb_clk_div2 ) 
   2'b00      : cp_clk_div2_wrap = cp_clk_div2_gen; 
   2'b01      : cp_clk_div2_wrap = 1'b1; //phase1
   2'b10      : cp_clk_div2_wrap = 1'b0; //phase2
   default    : cp_clk_div2_wrap = cp_clk_div2_gen; 
   endcase
end
 

// -----------------------------------------------------------------------------
// TEST DECODE
// -----------------------------------------------------------------------------
///verifier que scl n'est pas utilisee comme data



endmodule
