.ALIASES
C_CL            CL(1=0 2=OUT ) CN @CHAPTER 9.CMOS Opamp(sch_1):I96400@ANALOG.C.Normal(chips)
M_M1            M1(d=N00885 g=INN s=N00766 b=N00766 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I116405@SEDRA_LIB.PMOS0P5_BODY.Normal(chips)
V_Vd            Vd(+=D -=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I73755@SOURCE.VAC.Normal(chips)
M_M7            M7(d=OUT g=N01450 s=VDD b=VDD ) CN @CHAPTER 9.CMOS Opamp(sch_1):I00497@SEDRA_LIB.PMOS0P5.Normal(chips)
E_Ep            Ep(3=INP 4=N73627 1=D 2=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I73793@ANALOG.E.Normal(chips)
C_Cc            Cc(1=N82248 2=OUT ) CN @CHAPTER 9.CMOS Opamp(sch_1):I82240@ANALOG.C.Normal(chips)
M_M4            M4(d=A g=N00885 s=0 b=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I00068@SEDRA_LIB.NMOS0P5.Normal(chips)
E_En            En(3=N73627 4=INN 1=D 2=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I73829@ANALOG.E.Normal(chips)
M_M2            M2(d=A g=INP s=N00766 b=N00766 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I116968@SEDRA_LIB.PMOS0P5_BODY.Normal(chips)
M_M3            M3(d=N00885 g=N00885 s=0 b=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I00113@SEDRA_LIB.NMOS0P5.Normal(chips)
R_R             R(1=A 2=N82248 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I94833@ANALOG.R.Normal(chips)
I_Iref          Iref(+=N01450 -=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I01580@SOURCE.IDC.Normal(chips)
V_VCM           VCM(+=N73627 -=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I73647@SOURCE.VDC.Normal(chips)
V_VCC           VCC(+=VDD -=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I74376@SOURCE.VDC.Normal(chips)
M_M6            M6(d=OUT g=A s=0 b=0 ) CN @CHAPTER 9.CMOS Opamp(sch_1):I00157@SEDRA_LIB.NMOS0P5.Normal(chips)
M_M5            M5(d=N00766 g=N01450 s=VDD b=VDD ) CN @CHAPTER 9.CMOS Opamp(sch_1):I00435@SEDRA_LIB.PMOS0P5.Normal(chips)
M_M8            M8(d=N01450 g=N01450 s=VDD b=VDD ) CN @CHAPTER 9.CMOS Opamp(sch_1):I00218@SEDRA_LIB.PMOS0P5.Normal(chips)
_    _(OUT=OUT)
_    _(A=A)
_    _(INP=INP)
_    _(D=D)
_    _(INN=INN)
_    _(VDD=VDD)
.ENDALIASES