.ALIASES M_M19 M19(d=VOUT g=INN2 s=V8 b=V8 ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I242984362003979@BREAKOUT.MbreakN.Normal(chips) V_VOS VOS(+=VOS -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I23383440@SOURCE.VDC.Normal(chips) E_Ep3 Ep3(3=INP3 4=VIC3 1=VID3 2=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25748270@ANALOG.E.Normal(chips) V_VB VB(+=VDD -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I203516@SOURCE.VDC.Normal(chips) M_M5 M5(d=N255673 g=N255763 s=VSS b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I2429863147@BREAKOUT.MbreakN.Normal(chips) E_Ep2 Ep2(3=INP2 4=VIC2 1=VID2 2=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25748270@ANALOG.E.Normal(chips) M_M20 M20(d=VOUT g=V5 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I17795180@BREAKOUT.MbreakP.Normal(chips) V_VID3 VID3(+=VID3 -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I288042@SOURCE.VDC.Normal(chips) M_M1 M1(d=N255665 g=INP s=N255673 b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I24298436200@BREAKOUT.MbreakN.Normal(chips) V_VC VC(+=0 -=VSS ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I203606@SOURCE.VDC.Normal(chips) M_M23 M23(d=N282167 g=N282167 s=VSS b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I2429863147083@BREAKOUT.MbreakN.Normal(chips) V_VIC VIC(+=VIC -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25740262@SOURCE.VDC.Normal(chips) M_M15 M15(d=V8 g=N264229 s=VSS b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I2429863147@BREAKOUT.MbreakN.Normal(chips) V_VIC3 VIC3(+=VIC3 -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I288545@SOURCE.VAC.Normal(chips) M_M29 M29(d=V8 g=N285448 s=VSS b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I242986314782@BREAKOUT.MbreakN.Normal(chips) M_M21 M21(d=V5 g=V5 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I1779514181@BREAKOUT.MbreakP.Normal(chips) M_M2 M2(d=VOUT g=INN s=N255673 b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I2429843620039@BREAKOUT.MbreakN.Normal(chips) M_M31 M31(d=N285448 g=N285448 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I1779514284@BREAKOUT.MbreakP.Normal(chips) E_En1 En1(3=VIC 4=INN1 1=VID 2=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25744863@ANALOG.E.Normal(chips) V_Vdif Vdif(+=DIF -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I257362@SOURCE.VAC.Normal(chips) I_IBias IBias(+=VDD -=N255763 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I257255@SOURCE.IDC.Normal(chips) M_M11 M11(d=V5 g=INP1 s=V8 b=V8 ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I24298436200@BREAKOUT.MbreakN.Normal(chips) V_VAC VAC(+=VAC -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I254216@SOURCE.VAC.Normal(chips) M_M4 M4(d=VOUT g=N255665 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I177951@BREAKOUT.MbreakP.Normal(chips) M_M25 M25(d=V5 g=INP3 s=V8 b=V8 ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I2429843620078@BREAKOUT.MbreakN.Normal(chips) E_Ep1 Ep1(3=INP1 4=VIC 1=VID 2=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25748264@ANALOG.E.Normal(chips) M_M12 M12(d=VOUT g=INN1 s=V8 b=V8 ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I2429843620039@BREAKOUT.MbreakN.Normal(chips) V_VCM VCM(+=CM -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I257402@SOURCE.VDC.Normal(chips) V_VID VID(+=VID -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I2574026265@SOURCE.VDC.Normal(chips) M_M3 M3(d=N255665 g=N255665 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I17795141@BREAKOUT.MbreakP.Normal(chips) M_M6 M6(d=N255763 g=N255763 s=VSS b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I24298631470@BREAKOUT.MbreakN.Normal(chips) V_VID2 VID2(+=VID2 -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25736267@SOURCE.VAC.Normal(chips) M_M26 M26(d=VOUT3 g=INN3 s=V8 b=V8 ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I242984362003979@BREAKOUT.MbreakN.Normal(chips) M_M22 M22(d=V8 g=N282167 s=VSS b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I242986314782@BREAKOUT.MbreakN.Normal(chips) M_M14 M14(d=VOUT g=V5 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I177951@BREAKOUT.MbreakP.Normal(chips) M_M27 M27(d=VOUT3 g=V5 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I17795180@BREAKOUT.MbreakP.Normal(chips) V_slew_rate slew_rate(+=SLEW_RATE -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I246086@SOURCE.VPWL.Normal(chips) V_VIC2 VIC2(+=VIC2 -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25740268@SOURCE.VDC.Normal(chips) M_M16 M16(d=N264229 g=N264229 s=VSS b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I24298631470@BREAKOUT.MbreakN.Normal(chips) M_M24 M24(d=N282167 g=N282167 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I17795142@BREAKOUT.MbreakP.Normal(chips) E_En En(3=CM 4=INN 1=DIF 2=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I257448@ANALOG.E.Normal(chips) M_M30 M30(d=N285448 g=N285448 s=VSS b=VSS ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I2429863147083@BREAKOUT.MbreakN.Normal(chips) M_M13 M13(d=V5 g=V5 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I17795141@BREAKOUT.MbreakP.Normal(chips) M_M18 M18(d=V5 g=INP2 s=V8 b=V8 ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I2429843620078@BREAKOUT.MbreakN.Normal(chips) M_M17 M17(d=N264229 g=N264229 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I17795142@BREAKOUT.MbreakP.Normal(chips) E_En3 En3(3=VIC3 4=INN3 1=VID3 2=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25744869@ANALOG.E.Normal(chips) M_M28 M28(d=V5 g=V5 s=VDD b=VDD ) CN @AMPLI DIFFERENTIEL +CMOS.SCHEMATIC1(sch_1):I1779514181@BREAKOUT.MbreakP.Normal(chips) E_Ep Ep(3=INP 4=CM 1=DIF 2=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I257482@ANALOG.E.Normal(chips) V_VIN VIN(+=VIN -=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I233834@SOURCE.VDC.Normal(chips) E_En2 En2(3=VIC2 4=INN2 1=VID2 2=0 ) CN @AMPLI DIFFERENTIEL CMOS.SCHEMATIC1(sch_1):I25744869@ANALOG.E.Normal(chips) _ _(VDD=VDD) _ _(VSS=VSS) _ _(dif=DIF) _ _(CM=CM) _ _(INN=INN) _ _(slew_rate=SLEW_RATE) _ _(VAC=VAC) _ _(VOUT=VOUT) _ _(VIN=VIN) _ _(VOS=VOS) _ _(INP=INP) _ _(VIC=VIC) _ _(VID=VID) _ _(VOUT=VOUT_264279) _ _(INN1=INN1) _ _(INP1=INP1) _ _(VDD=VDD_264313) _ _(V5=V5) _ _(VSS=VSS_264435) _ _(V8=V8) _ _(VID2=VID2) _ _(VOUT=VOUT_282217) _ _(V8=V8_282183) _ _(VSS=VSS_282375) _ _(VDD=VDD_282251) _ _(INP2=INP2) _ _(V5=V5_282183) _ _(VIC2=VIC2) _ _(INN2=INN2) _ _(VID3=VID3) _ _(INP3=INP3) _ _(INN3=INN3) _ _(V5=V5_285464) _ _(VOUT3=VOUT3) _ _(VDD=VDD_285532) _ _(V8=V8_285464) _ _(VSS=VSS_285656) _ _(VIC3=VIC3) .ENDALIASES