.ALIASES
M_M6            M6(d=VRECOPIE g=VRECOPIE s=VSS b=VSS ) CN @ESSAI.SCHEMATIC1(sch_1):I000444852@CD4007.cd4007_NMOS.Normal(chips)
V_V1            V1(+=VDD -=0 ) CN @ESSAI.SCHEMATIC1(sch_1):I01708@SOURCE.VDC.Normal(chips)
M_M4            M4(d=N00324 g=N05427 s=N00540 b=VSS ) CN @ESSAI.SCHEMATIC1(sch_1):I0004448@CD4007.cd4007_NMOS.Normal(chips)
M_M7            M7(d=VOUT g=VRECOPIE s=VSS b=VSS ) CN @ESSAI.SCHEMATIC1(sch_1):I00044510@CD4007.cd4007_NMOS.Normal(chips)
M_M1            M1(d=N00175 g=0 s=N00540 b=VSS ) CN @ESSAI.SCHEMATIC1(sch_1):I00044@CD4007.cd4007_NMOS.Normal(chips)
M_M8            M8(d=VOUT g=N00324 s=VDD b=VDD ) CN @ESSAI.SCHEMATIC1(sch_1):I0008154@CD4007.cd4007_PMOS.Normal(chips)
V_V2            V2(+=0 -=VSS ) CN @ESSAI.SCHEMATIC1(sch_1):I01764@SOURCE.VDC.Normal(chips)
M_M2            M2(d=N00324 g=N00175 s=VDD b=VDD ) CN @ESSAI.SCHEMATIC1(sch_1):I00081@CD4007.cd4007_PMOS.Normal(chips)
V_V3            V3(+=N05427 -=0 ) CN @ESSAI.SCHEMATIC1(sch_1):I06370@SOURCE.VAC.Normal(chips)
C_C2            C2(1=VOUT 2=N00324 ) CN @ESSAI.SCHEMATIC1(sch_1):I08107@ANALOG.C.Normal(chips)
M_M3            M3(d=N00175 g=N00175 s=VDD b=VDD ) CN @ESSAI.SCHEMATIC1(sch_1):I0008144@CD4007.cd4007_PMOS.Normal(chips)
M_M5            M5(d=N00540 g=VRECOPIE s=VSS b=VSS ) CN @ESSAI.SCHEMATIC1(sch_1):I0004451@CD4007.cd4007_NMOS.Normal(chips)
R_R1            R1(1=VRECOPIE 2=VDD ) CN @ESSAI.SCHEMATIC1(sch_1):I01643@ANALOG.R.Normal(chips)
C_C1            C1(1=0 2=VOUT ) CN @ESSAI.SCHEMATIC1(sch_1):I03357@ANALOG.C.Normal(chips)
_    _(vdd=VDD)
_    _(vrecopie=VRECOPIE)
_    _(vss=VSS)
_    _(vout=VOUT)
.ENDALIASES