.ALIASES
R_R2            R2(1=N136961 2=N13466 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13728@ANALOG.R.Normal(chips)
R_R             R(1=0 2=OUTPUT ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13248@ANALOG.R.Normal(chips)
Kn_K1            K1() CN @FORWARD1.SCHEMATIC1(sch_1):INS13748@BREAKOUT.kbreak.Normal(chips)
X_S1    S1(1=CONTROL 2=0 3=N13466 4=0 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13270@BREAKOUT.Sbreak.Normal(chips)
V_V2            V2(+=CONTROL -=0 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13510@SOURCE.VPULSE.Normal(chips)
L_Lx            Lx(1=N13384 2=OUTPUT ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13314@ANALOG.L.Normal(chips)
C_C             C(1=0 2=OUTPUT ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13336@ANALOG.C.Normal(chips)
D_D2            D2(1=0 2=N13384 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13352@BREAKOUT.Dbreak.Normal(chips)
L_L2            L2(1=N13438 2=0 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13594@ANALOG.L.Normal(chips)
L_L1            L1(1=N13412 2=N13466 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13612@ANALOG.L.Normal(chips)
L_L3            L3(1=N13668 2=N13412 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13644@ANALOG.L.Normal(chips)
D_D1            D1(1=N13438 2=N13384 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13416@BREAKOUT.Dbreak.Normal(chips)
L_Lm            Lm(1=N13412 2=N136961 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13686@ANALOG.L.Normal(chips)
V_Vs            Vs(+=N13412 -=0 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13228@SOURCE.VDC.Normal(chips)
D_D3            D3(1=0 2=N13668 ) CN @FORWARD1.SCHEMATIC1(sch_1):INS13710@BREAKOUT.Dbreak.Normal(chips)
_    _(Output=OUTPUT)
_    _(control=CONTROL)
.ENDALIASES