.ALIASES
V_Vs1           Vs1(+=N14068 -=0 ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14000@SOURCE.VDC.Normal(chips)
L_L1            L1(1=N14068 2=N14106 ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14254@ANALOG.L.Normal(chips)
X_S2    S2(1=CONTROL 2=0 3=N14106 4=0 ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14020@BREAKOUT.Sbreak.Normal(chips)
C_C1            C1(1=0 2=OUTPUT ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS15974@ANALOG.C.Normal(chips)
D_D2            D2(1=N15118 2=OUTPUT ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14078@BREAKOUT.Dbreak.Normal(chips)
R_R1            R1(1=0 2=OUTPUT ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS16018@ANALOG.R.Normal(chips)
L_Lm            Lm(1=N14068 2=N143421 ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14332@ANALOG.L.Normal(chips)
R_R2            R2(1=N143421 2=N14106 ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14370@ANALOG.R.Normal(chips)
Kn_K1            K1() CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14390@BREAKOUT.kbreak.Normal(chips)
V_V3            V3(+=CONTROL -=0 ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14150@SOURCE.VPULSE.Normal(chips)
L_L2            L2(1=0 2=N15118 ) CN @FLYBACK CONVERTER WITH LM.SCHEMATIC1(sch_1):INS14660@ANALOG.L.Normal(chips)
_    _(control=CONTROL)
_    _(Output=OUTPUT)
.ENDALIASES
