Chap 9
------

File Name           Description                      Reference in Book
---------           -----------                      -----------------
edge_dff.v          Model an edge triggered Dff         Section 9.1.1
                    with asynchronous reset using
                    procedural assign and deassign

for-rel.v           Illustrates the use of force        Section 9.1.2
                    and release to manipulate 
                    output. 

param1.v            Illustrate how to override          Section 9.2.1
                    parameters using the defparam
                    statement.


param2.v            Illustrate how to override          Section 9.2.2
                    parameters using the 
                    module instance parameter
                    values.

param3.v            Illustrates the importance          Section 9.2.2
                    of the order of parameter
                    specification in a module 
                    instance.

con_comp.v          Example of conditional              Section 9.3.1
                    compilation. 
                

con_exec.v          Example of conditional              Section 9.3.2
                    execution.

timescl.v           Illustrates the use of timescales.  Section 9.4

files.v             Illustrates how to open, write      Section 9.5.1
                    to and close files.

hier.v              Illustrates how to display          Section 9.5.2
                    hierarchy.

memory.v            Illustrates how to initialize       Section 9.5.5
                    memory from a file. Reads the file
		    file "init.dat". A project file
		    memory.spj has been created for
		    you. Simply open up the project 
		    file "memory.spj" and run the 
		    simulation.