Chap 14
-------

All the files in this directory are synthesizable. The reader
is encouraged to synthesize these files, to observe the results
and to experiment with these files. Stimulus has not been generated
for these files. The reader is encouraged to write the stimulus
and test the simulation output for correctness.


File Name       Description                      Reference in Book
---------       -----------                      -----------------

fadder.v	Implement a 1-bit full adder	 Section 14.3.3
		using assign statements.

mux.v		Implement a 2-to-1 multiplexer	 Section 14.3.3
		using assign statement.

for.v		Implement an 8 bit ripple adder	 Section 14.3.3
		using a for loop.

edge_dff.v	Inferring a 1-bit positive	 Section 14.3.3
		edge triggered D-flipflop using
		the always statement.

latch.v		Inferring a 1-bit latch from 	 Section 14.3.3
		the always statement.

function.v	Implement a 4-bit full adder
		using a function "fulladd"

latchmux.v	Illustrates the difference 	 Section 14.6.1
		between a latch inference and
		a mux inference. A slight change
		can make a lot of difference.

multiple.v	Illustrates the effect of 	 Section 14.6.1
		multiple assignments on the same
		variable.


