Running: F:\Logiciels\EDA\Xilinx\14.5\ISE_DS\ISE\bin\nt64\unwrapped\fuse.exe -intstyle ise -incremental -lib unisims_ver -lib unimacro_ver -lib xilinxcorelib_ver -o F:/WORKAREA/counter/first_counter_tb_isim_beh.exe -prj F:/WORKAREA/counter/first_counter_tb_beh.prj work.first_counter_tb work.glbl 
ISim P.58f (signature 0x7708f090)
Number of CPUs detected in this system: 8
Turning on mult-threading, number of parallel sub-compilation jobs: 16 
Determining compilation order of HDL files
Analyzing Verilog file "F:/WORKAREA/counter/bench.v" into library work
Analyzing Verilog file "F:/Logiciels/EDA/Xilinx/14.5/ISE_DS/ISE//verilog/src/glbl.v" into library work
Starting static elaboration
Completed static elaboration
Compiling module counter
Compiling module first_counter_tb
Compiling module glbl
Time Resolution for simulation is 1ps.
Waiting for 1 sub-compilation(s) to finish...
Compiled 3 Verilog Units
Built simulation executable F:/WORKAREA/counter/first_counter_tb_isim_beh.exe
Fuse Memory Usage: 28052 KB
Fuse CPU Usage: 311 ms