* LCDINIT.H
* Kam K. Leang and Walter Barnum     4/4/98
* Designed for 68HC11 Botboard
*-----------------------------------------------------------------------------
* This header file initializes an HITACHI LCD (2x16 or 1x8) for character
* printing.  The process consists of completing a series of instructions
* along with delaying for a small period of time (>15ms) to ensure that each
* instruction has completed.
*
*          **CONNECTIONS BETWEEN LCD AND HC12**
* Control Bus: PORTB($1004)    (E=bit0, R/S=bit1, R/W=bit2) Single chip Mode
*                                                       PortB is output only
* Data Bus:    PORTC($1003)    ((MSB)(B7)----->(LSB)(B0))
*                         
*-----------------------------------------------------------------------------

DATABUS EQU     PORTC
CTLBUS  EQU     PORTB
DATACTL EQU     DDRC

*-----------------------------------------------------------------------------

lcdinit EQU     *                       ;Equate LCD initialize subroutine
                                        ;to this location in memory
        LDAA    #$FF                    ;Load FF into ACCA to configure PORTC
                                        ;to output mode
        STAA    DATACTL                    
        LDX     #$0001                  ;This step sets the Enable bit of the
                                        ;LCD control register to high and
                                        ;clears the data bus.
                                        ;Instruction commands are only enabled
                                        ;when the E bit switches from
                                        ;High--->Low.
        STX     DATABUS
        LDAA     #$30                    ;Put initialization data on
                                        ;data bus Port C and toggle
                                        ;enable bit E through 3 on-ff cycles.
                                        ;procedure for the Hitachi
                                        ;LCD prior to displaying characters.
        STAA    DATABUS
        LDAA    #$00                    ;First toggle of E bit from High-->Low.
        STAA    CTLBUS
        JSR     delay                   ;Delay allowing the instruction
                                        ;to complete before moving
                                        ;to the next instruction.
        LDAA    #$01                    ;Reset enable bit E to 1
        STAA    CTLBUS
        LDAA    #$00                    ;Second toggle of enable bit.
        STAA    CTLBUS
        JSR     delay
        LDAA    #$01                    ;Reset enable bit E to 1
        STAA    CTLBUS
        LDAA    #$00                    ;Third toggle of enable bit,
                                        ;end of 3 toggle process.
        STAA    CTLBUS
        JSR     delay
        LDX     #$3001                  ;Function set step.  This
                                        ;step sets up the display
                                        ;for 8-bit operation, selects
                                        ;2-line display and 5x7
                                        ;dot character font.    To set
                                        ;to 1-line display, use #$3001.
        STX     DATABUS
        LDAA    #$00                    ;Enable the function set
        STAA    CTLBUS
        JSR     delay                   ;Delay for a period of time
                                        ;to ensure that the function
                                        ;set step has been executed.
        LDX     #$0E01                  ;Turn on the display and have
                                        ;cursor blink.  For no blink
                                        ;use #$0E01,blink use F.  If blinking
                                        ;cursor mode is used, be warned that
                                        ;continuous display will flicker.
                                        ;To turn off diplay, use #$0B01.
        STX     DATABUS
        LDAA    #$00                    ;Enable diplay on step
        STAA    CTLBUS
        JSR     delay
        LDX     #$0601                  ;Sets the mode to increment
                                        ;the address by one and to
                                        ;shift the cursor to the right
                                        ;at the time of write, to the
                                        ;DD/CG RAM.  Display is not
                                        ;shifted.
        STX     DATABUS
        LDAA    #$00                    ;Enable the mode set
        STAA    CTLBUS
        JSR     delay
        LDX     #$0101                  ;Clear the display and put
                                        ;the cursor to the far left
                                        ;of the screen at the origin.
        STX     DATABUS
        LDAA    #$00                    ;Enable the clear display step
        STAA    CTLBUS
        JSR     delay
        LDAA    #$01                    ;Disable enable bit
        STAA    CTLBUS
        JSR     delay
        RTS                             ;Return from subroutine

delay   EQU     *                       ;Delay Subroutine
        PSHX
        LDX     #$FA00                  ;Load $0000 into ACCX
loop_delay:                                       
        INX                             ;Increment ACCX by one
        BNE loop_delay                  ;Branch if not equal to zero
                                        ;to LOOP
        PULX
        RTS                             ;Return from subroutine
*-----------------------------------------------------------------------------